脈沖按鍵電話顯示器

1、課 程 設(shè) 計(jì)課 程 EDA技術(shù)課程設(shè)計(jì) 題 目 脈沖按鍵電話顯示器 院 系 專業(yè)班級 學(xué)生學(xué)號 指導(dǎo)教師 2012年 3 月2日課程設(shè)計(jì)任務(wù)書一、總體設(shè)計(jì)思想1.基本原理EDA技術(shù)就是依賴功能強(qiáng)大的計(jì)算機(jī)，在EDA工具軟件平臺上，對以硬件描述語言HDL為系統(tǒng)邏輯描述手段完成的設(shè)計(jì)文件，自動的完成邏輯編譯、化簡、分割、綜合、布局布線以及邏輯優(yōu)化和仿真測試，直至實(shí)現(xiàn)既定的電子線路系統(tǒng)功能。在本次課程設(shè)計(jì)中是用VHDL語言實(shí)現(xiàn)一個能準(zhǔn)確地反映按鍵數(shù)字、具有8位顯示的電話按鍵顯示器。摘機(jī)時開始工作，顯示器顯示從低位向高位前移，逐位顯示按鍵數(shù)字，最低位為當(dāng)前輸入位；設(shè)置一個“重?fù)堋辨I，按下此鍵能顯示最

2、后一次輸入的電話號碼；掛機(jī)2秒后或按熄滅鍵，熄滅顯示器顯示。2.設(shè)計(jì)框圖數(shù) 字鍵 入控制電路1譯碼顯示電 路脈 沖 顯 示電 路控制電路2移位寄存器計(jì)時電路譯碼器顯示電路圖1 脈沖按鍵電話顯示器總體設(shè)計(jì)方案二、設(shè)計(jì)步驟和調(diào)試過程1、總體設(shè)計(jì)電路本文設(shè)計(jì)的脈沖按鍵電話顯示器由五個模塊組成：按鍵電路、譯碼器、移位寄存、鎖存器和數(shù)碼管顯示電路，其中移位寄存、鎖存器和數(shù)碼管譯碼顯示電路為系統(tǒng)的主要組成部分。圖2 總體設(shè)計(jì)電路模塊2、模塊設(shè)計(jì)和相應(yīng)模塊程序2.1頂層文件按鍵電路模塊。提供“0”到“9”數(shù)字按鍵的輸入，同時設(shè)置有撥號鍵，清除鍵，掛機(jī)鍵和重?fù)苕I。(1) 頂層文件程序模塊程序：LIBRARY

3、IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY UP_KEY IS PORT(DIN1:IN STD_LOGIC_VECTOR(9 DOWNTO 0); CLK1,CLEAR,DIAL,RE_DIAL:IN STD_LOGIC;KEYOUT:OUT STD_LOGIC; SEG71:OUT STD_LOGIC_VECTOR(6 DOWNTO 0); SEG8:OUT STD_LOGIC_VECTOR(7 DOWNTO 0); END ENTITY;ARCHITECTURE ONE OF UP_

4、KEY IS COMPONENT SHOW IS PORT(DIN:IN STD_LOGIC_VECTOR(9 DOWNTO 0);CLK,CLEAR,DIAL,RE_DIAL:IN STD_LOGIC;KEYOUT:OUT STD_LOGIC;SET:OUT STD_LOGIC_VECTOR(3 DOWNTO 0);SEG8:OUT STD_LOGIC_VECTOR(7 DOWNTO 0);END COMPONENT;COMPONENT TRA IS PORT(BCD1:IN STD_LOGIC_VECTOR(3 DOWNTO 0);SEG7:OUT STD_LOGIC_VECTOR(6 D

5、OWNTO 0);END COMPONENT;SIGNAL SET_1:STD_LOGIC_VECTOR(3 DOWNTO 0);BEGIN U1:SHOW PORT MAP( DIN1,CLK1,CLEAR,DIAL,RE_DIAL,KEYOUT,SET_1,SEG8); U2:TRA PORT MAP(SET_1,SEG71);END ARCHITECTURE ONE;(2) 各端口說明分別為：輸入： 輸出：DIN190：09十個數(shù)字鍵； KEYOUT：可輸入數(shù)字指示燈；CLK1：時鐘脈沖； SEG7160：8位數(shù)碼管； CLEAR：刪除鍵； SEG320：數(shù)碼管的七段；DIAL：撥號鍵；

6、RE_DAIL：重?fù)苕I2.2 BCD譯碼模塊譯碼器有兩個功能。第一，把輸入的一位鍵值轉(zhuǎn)換成四位BCD碼；第二，把4位二進(jìn)制碼譯成相應(yīng)的數(shù)碼管輸出顯示碼。(1) BCD譯碼子程序模塊程序：LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;USE IEEE.STD_LOGIC_UNSIGNED.ALL;ENTITY TRA IS PORT( BCD1:IN STD_LOGIC_VECTOR(3 DOWNTO 0); SEG7:OUT STD_LOGIC_VECTOR(6 DOWNTO 0); END ENTITY;ARCHITECTURE ONE OF TRA IS

7、BEGIN PROCESS(BCD1)IS BEGIN CASE BCD1 IS WHEN "0000"=>SEG7<="0111111" WHEN "0001"=>SEG7<="0000110" WHEN "0010"=>SEG7<="1011011" WHEN "0011"=>SEG7<="1001111" WHEN "0100"=>SEG7<=&quo

8、t;1100110" WHEN "0101"=>SEG7<="1101101" WHEN "0110"=>SEG7<="1111101" WHEN "0111"=>SEG7<="0000111" WHEN "1000"=>SEG7<="1111111" WHEN "1001"=>SEG7<="1101111" WHEN OTHE

9、RS=>SEG7<="0000000" END CASE; END PROCESS;END ARCHITECTURE;(2) BCD譯碼模塊電路圖3 BCD譯碼程序模塊電路各端口說明分別為：輸入： 輸出：BCD130：4位BCD碼； 數(shù)碼管的七段顯示2.3鍵值顯示模塊數(shù)碼管顯示用于將設(shè)置好的每個按鍵的鍵值在數(shù)碼管上顯示出來。由于實(shí)驗(yàn)過程中需要使用8個數(shù)碼管，因此數(shù)碼管顯示模塊必須加上數(shù)碼管片選及移位得程序，從而實(shí)現(xiàn)數(shù)據(jù)輸入以后從低位向高位移動、顯示。(1) 鍵值顯示子程序模塊程序：LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;

10、USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY SHOW IS PORT(DIN:IN STD_LOGIC_VECTOR(9 DOWNTO 0); CLK,CLEAR,DIAL,RE_DIAL:IN STD_LOGIC; KEYOUT:OUT STD_LOGIC; SET:OUT STD_LOGIC_VECTOR(3 DOWNTO 0); SEG8:OUT STD_LOGIC_VECTOR(7 DOWNTO 0);END ENTITY;ARCHITECTURE ONE OF SHOW ISSUBTYPE TEN IS STD_LOGIC_VECTOR(3 DOW

11、NTO 0);SIGNAL BCD :TEN;TYPE NUMBER1 IS ARRAY(7 DOWNTO 0) OF STD_LOGIC_VECTOR(3 DOWNTO 0);SIGNAL NUMBER : NUMBER1;SIGNAL KEY,KEY1,CLK1,DIAL1,RE_DIAL1:STD_LOGIC;SIGNAL COUNT:STD_LOGIC_VECTOR(3 DOWNTO 0);SIGNAL COUNT1:STD_LOGIC_VECTOR(3 DOWNTO 0);SIGNAL COUNT2:STD_LOGIC_VECTOR(2 DOWNTO 0);SIGNAL DIN1:

12、STD_LOGIC_VECTOR(9 DOWNTO 0);SIGNAL LOCK: STD_LOGIC_VECTOR(31 DOWNTO 0);BEGIN PROCESS(CLK)IS BEGIN IF RISING_EDGE(CLK) THEN COUNT1<=COUNT1+1; END IF; END PROCESS; CLK1<='0' WHEN COUNT1<"1100" ELSE '1' PROCESS(CLK1)ISBEGIN IF RISING_EDGE(CLK1) THEN DIN1(9 DOWNTO 0)&

13、lt;=DIN(9 DOWNTO 0); DIAL1<=DIAL; RE_DIAL1<=RE_DIAL; END IF; END PROCESS; KEY<=(DIN1(0) OR DIN1(1) OR DIN1(2) OR DIN1(3) OR DIN1(4) OR DIN1(5) OR DIN(6) OR DIN1(7) OR DIN1(8) OR DIN1(9); PROCESS(CLK1)ISBEGIN IF FALLING_EDGE(CLK1) THEN IF COUNT2="100" THEN IF CLEAR='0'AND R

14、E_DIAL='0' THEN KEY1<=KEY; ELSIF CLEAR ='1' AND RE_DIAL='0' THEN KEY1<=CLK; ELSE KEY1<=RE_DIAL1; END IF; COUNT2<="000" ELSE COUNT2<=COUNT2+1; END IF; END IF; END PROCESS; PROCESS(DIN1)ISBEGIN IF DIN1(6)='1' THEN BCD<="0110" ELSIF

15、DIN1(1)='1' THEN BCD<="0001" ELSIF DIN1(2)='1' THEN BCD<="0010" ELSIF DIN1(3)='1' THEN BCD<="0011" ELSIF DIN1(4)='1' THEN BCD<="0100" ELSIF DIN1(5)='1' THEN BCD<="0101" ELSIF DIN1(0)='1'

16、THEN BCD<="0000" ELSIF DIN1(7)='1' THEN BCD<="0111" ELSIF DIN1(8)='1' THEN BCD<="1000" ELSIF DIN1(9)='1' THEN BCD<="1001" ELSE BCD<="0000" END IF; END PROCESS; KEYOUT<=KEY1; PROCESS(KEY1)IS BEGIN IF RISING_ED

17、GE(KEY1) THEN IF CLEAR='0' AND RE_DIAL1='0' THEN NUMBER(7)<=NUMBER(6); NUMBER(6)<=NUMBER(5); NUMBER(5)<=NUMBER(4); NUMBER(4)<=NUMBER(3); NUMBER(3)<=NUMBER(2); NUMBER(2)<=NUMBER(1); NUMBER(1)<=NUMBER(0); NUMBER(0)<=BCD; ELSIF CLEAR='1' AND RE_DIAL1='

18、;0' THEN NUMBER(0)<=NUMBER(1); NUMBER(1)<=NUMBER(2); NUMBER(2)<=NUMBER(3); NUMBER(3)<=NUMBER(4); NUMBER(4)<=NUMBER(5); NUMBER(5)<=NUMBER(6); NUMBER(6)<= NUMBER(7); NUMBER(7)<="1111" ELSE NUMBER(7)<= LOCK(31 DOWNTO 28); NUMBER(6)<= LOCK(27 DOWNTO 24); NUMBE

19、R(5)<= LOCK(23 DOWNTO 20); NUMBER(4)<= LOCK(19 DOWNTO 16); NUMBER(3)<= LOCK(15 DOWNTO 12); NUMBER(2)<= LOCK(11 DOWNTO 8); NUMBER(1)<= LOCK(7 DOWNTO 4); NUMBER(0)<= LOCK(3 DOWNTO 0); END IF; END IF; END PROCESS; PROCESS(CLK)IS BEGIN IF RISING_EDGE(CLK) THEN COUNT<=COUNT+1; END IF

20、; END PROCESS; PROCESS(COUNT)IS BEGIN CASE COUNT IS WHEN "0001"=>SET<=NUMBER(7);SEG8<="00000001" WHEN "0011"=>SET<=NUMBER(6);SEG8<="00000010" WHEN "0101"=>SET<=NUMBER(5);SEG8<="00000100" WHEN "0111"=>

21、SET<=NUMBER(4);SEG8<="00001000" WHEN "1001"=>SET<=NUMBER(3);SEG8<="00010000" WHEN "1011"=>SET<=NUMBER(2);SEG8<="00100000" WHEN "1101"=>SET<=NUMBER(1);SEG8<="01000000" WHEN "1111"=>SET&

22、lt;=NUMBER(4);SEG8<="10000000" WHEN OTHERS=>NULL; END CASE; END PROCESS; PROCESS(DIAL1)IS BEGIN IF RISING_EDGE(DIAL1) THEN LOCK(31 DOWNTO 28)<=NUMBER(7); LOCK(27 DOWNTO 24)<=NUMBER(6); LOCK(23 DOWNTO 20)<=NUMBER(5); LOCK(19 DOWNTO 16)<=NUMBER(4); LOCK(15 DOWNTO 12)<=NU

23、MBER(3); LOCK(11 DOWNTO 8)<=NUMBER(2); LOCK(7 DOWNTO 4)<=NUMBER(1); LOCK(3 DOWNTO 0)<=NUMBER(0); END IF; END PROCESS;END ARCHITECTURE;(2) 鍵值顯示模塊圖4按鍵顯示控制框圖各端口說明分別為：輸入： 輸出：DIN 90：09十個數(shù)字鍵； KEYOUT：可輸入數(shù)字指示燈；CLK：時鐘脈沖； SET30：鍵值的BCD碼 CLEAR：刪除鍵； SEG320：數(shù)碼管的七段；DIAL：撥號鍵；RE_DAIL：重?fù)苕I3、仿真及仿真結(jié)果分析圖5 仿真圖4、實(shí)驗(yàn)調(diào)試結(jié)果將程序下載進(jìn)行硬件測試。在Quartus開發(fā)環(huán)境中進(jìn)行管腳鎖定，連接好數(shù)碼管驅(qū)動電路，然后將目標(biāo)文件下載到器件中。最終可以看到按鍵正常顯示、“重?fù)堋辨I功能正常、達(dá)到設(shè)計(jì)要求。三、結(jié)論及心得體會通過本次課程設(shè)計(jì)，讓我在以前所學(xué)知識的基礎(chǔ)上，更加了解了對EDA語言編程的認(rèn)識，不僅強(qiáng)化了以前所學(xué)過的知識，并且學(xué)到了許多書本上