單片機畢業(yè)設(shè)計論文外文翻譯中英文對照：芯片STC12C5204AD的IO口配置

1、單片機畢業(yè)設(shè)計論文外文翻譯中英文對照：芯片STC12C5204AD的IO口配置 Chip STC12C5204AD I/O port configuration STC12C5204AD series microcontroller its all I/O ports are controlled by the software configuration into 4 kinds of work type 4 types are respectively: quasi two-way mouth standard the 8051 output mode, push-pull output,

2、 only for input high resistance or open-drain output functions. Every mouth consists of two control register the relevant position control each pin type of work. STC12C5204AD series microcontroller to electricity reattachment shall prevail two-way mouth standard the 8051 output mode mode: 2V above h

3、igh level, 0.8 V for low level below. 1. Quasi two-way mouth output configuration Quasi two-way mouth output type can be used as output and input function but don't need to reconfigure mouth lines output state. This is because juncture lines output is 1 drive ability is very weak, allowing exter

4、nal devices will its down. When pins for low, it output driving ability, can absorb the considerable current. Quasi two-way mouth have 3 pull_up transistor adapted to different needs. In the three and one transistor, pull up transistor called weak on pull ", for 1 and paternal line registers it

5、self pins for 1 open. This pull_up provides basic drive current make prospective two-way mouth for 1 output. If a pin for 1 and output by external devices to drop down to low, pull up close and weak "very weak pull_up" maintain open position, in order to put this pin for low, strong to pul

6、l the external devices must have enough power to make pin infused current threshold voltage of a voltage to the following. Article 2 pull_up transistors, called "extremely weak on pull", 1 latch paternal line when open. When pin, the very weak suspended the pull_up source generates very we

7、ak and current will pin and high level. Article 3 pull_up transistor called "powerful pull". Juncture line latches from 0 to 1, the jumping to accelerate must pull up by logic 0 to two-way mouth logic 1 conversion. When this happened, powerful pull open about 2 machine cycle to make pins c

8、an quickly pull to the earth high level. Quasi two-way mouth output shown below. STC12C520 series microcontroller 3V device, if the user is in pins plus 5V voltage, there will be a current flow from pins, this has caused additional VDD power consumption. Accordingly, the proposal is not in quasi two

9、-way mouth mode 3V microcontroller pins to exert 5V voltage, such as the use of words, will add current limiting resistor, or using diode do input isolation, or use triode do output segregation. Quasi two-way mouth with a schmidt trigger input and a interference suppression circuit. 2. The push-pull

10、 output configuration The drop-down push-pull output configuration open-drain output and the structure and the prospective two-way mouth down same structure, but when latches is 1 provides continuous strong pull up. The push-pull model need more commonly used for driving current situation. The push-

11、pull pins configuration are shown below. 3. Only for input high resistance configuration Input port configuration are shown below. Input port with a schmidt trigger input and a interference suppression circuit. 4. Open-drain output configuration Juncture line latches is 0, the open-drain output clos

12、e all pull_up transistors. When, as a logical output, this configuration mode must have externally pull, usually by resistance receiving V D D outside. This style of drop-down and quasi two-way mouth the same. The jammer line configuration are shown below. Open-drain port with a schmidt trigger inpu

13、t and a interference suppression circuit. A typical transistor control circuit If use weak pull_up control, suggestion plus pull-up resistors R1 3.3 K 10K, if not add pull-up resistors R 1 3.3 K 10K, suggest R2 value in the 15K above, or use a strong push-pull output.STC12C5204AD series microcontrol

14、ler programmable counter array PCA PCA contains a special 16 timer, has four 16 bits of capture/comparison of module and connected. Each module programmable work In four mode: increase/decrease along the capture, software timer, high-speed output or could be modulated pulse output. Modules connected

15、 to P3.7 0 CEX0 / PCA0 / PWM0, module 1 connected to P3.5 CEX1 / PCA1 / PWM1, modules connected to P2.0 2 CEX2 / PCA2 / PWM2, modules connected to P2.4 3 CEX3 / PCA3 / PWM3. Register the content of CH and CL is free of 16 PCA increasing count the value of the timer. PCA timer is four modules, the pu

16、blic time benchmark by programming work Programmable Counter Array PCA Timer/Counter CMOD SFR there are 2 bytes and PCA related. They were: CIDL, idle mode allows stop PCA; ECF, buy a, enabling PCA interrupt, when PCA timer spillover will PCA counting overflow marks CCON SFR CF buy bits. CCON SFR co

17、ntains PCA operating control bits CR and PCA timer mark CF and symbol of each module CCF3 / CCF2 CCF0. CCF1 / / Through the software for a CR bits CCON. 6 to run PCA. CR bit is reset when PCA closed. When PCA counter overflow, CF patients CCON. 7 buy a, if CMOD register, it produces ECF position a d

18、isruption. CF bits can only through software cleared. CCON register a 0 3 is PCA modules logo a 0 0, a corresponding module 1 corresponding module 1, bits 2 corresponding module 2, a 3 corresponding module 3, when there is a match or by hardware buy a comparisons. These signals are the only through

19、software cleared. PCA capture of patterning If CCON SFR bits of the throne of CCFn and CCAPMn SFR ECCFn bit is set position, will produce the interruption. A software timer mode Through the CCAPMn registers for a ECOM and MAT bits, can make the PCA module used for software timer below. PCA timer val

20、ues and module of the register compared to capture, when both values equal, if a CCON SFR in CCFn in and a ECCFn CCAPMn SFR in all buy bits, will produce the interruption. PCA Software Timer Mode/Software Timer model/PCA comparative Mode PCA Software Timer Mode/Software Timer model/PCA comparative M

21、ode High-speed output model This model below, when PCA counter plan of the numerical and module capture registers matching, PCA value CEXn output will happen module of the flip. To activate the high-speed output modes of CCAPMn TOG SFR, modules, MAT and ECOM bit must buy bits. PCA High - Speed, Outp

22、ut Mode/PCA high-speed Output Mode In use PCA high-speed output mode special application note: If a certain PCA module working in high speed pulse output mode, want to use software output change the same group of other common I/O port state, need to do first, whether CCAPnH judge CH is equal to abid

23、e, can freely modify, if equal, and determine CCAPnL circumstances CL is allowed to change the same group of other common I/O port state. If use P3.7 / PCA0 / PWM0 do PCA high-speed pulse output, and the program inside and with software output change when the state P3.4 mouth, you need to do judgmen

24、t. When one has the PCA high-speed pulse output function of I/O mouth working in high speed pulse output mode, if the software for the same group of other I/O port operation, if meet PCA comparator matching, this operation can change the pulse output function with PCA high-speed mouth of the I/O. PC

25、A PWM mode/modulation pulse width output mode Since all share only PCA timer modules, all their output frequency is same. The output of each module 390v is independent of the changes, and using EPCnL, captured CCAPnL of registers concerned. When CL SFR value is less than CCAPnL EPCnL, when output is

26、 low, and the value of SFR when PCA CL is equal to or greater than EPCnL, CCAPnL , the output as high. When the value of the CL by FF into EPCnH, 00 overflow, CCAPnH the contents of EPCnL, loaded into the CCAPnL . In this way, can realize update PWM without interference. To make CCAPMn PWM mode, mod

27、ule can PWMn and ECOMn bits of the register to buy bits.譯文 芯片STC12C5204AD的I/O口配置 STC12C5204AD系列單片機其所有I/O口均可由軟件配置成4 種工作類型4 種類型分別為:準(zhǔn)雙向口(標(biāo)準(zhǔn)8051輸出模式)、推挽輸出、僅為輸入(高阻)或開漏輸出功能。每個口由2個控制寄存器中的相應(yīng)位控制每個引腳工作類型。STC12C5204AD系列單片機上電復(fù)位后為準(zhǔn)雙向口(標(biāo)準(zhǔn)8051輸出模式)模式:2V 以上時為高電平,0.8V 以下時為低電平。 1.準(zhǔn)雙向口輸出配置 準(zhǔn)雙向口輸出類型可用作輸出和輸入功能而不需重新配置口線輸

28、出狀態(tài)。這是因為當(dāng)口線輸出為1時驅(qū)動能力很弱,允許外部裝置將其拉低。當(dāng)引腳輸出為低時,它的驅(qū)動能力很強,可吸收相當(dāng)大的電流。準(zhǔn)雙向口有3個上拉晶體管適應(yīng)不同的需要。 在3個上拉晶體管中,有1個上拉晶體管稱為“弱上拉”,當(dāng)口線寄存器為1且引腳本身也為1時打開。此上拉提供基本驅(qū)動電流使準(zhǔn)雙向口輸出為1。如果一個引腳輸出為1而由外部裝置下拉到低時,弱上拉關(guān)閉而“極弱上拉”維持開狀態(tài),為了把這個引腳強拉為低,外部裝置必須有足夠的灌電流能力使引腳上的電壓降到門檻電壓以下。 第2個上拉晶體管,稱為“極弱上拉”,當(dāng)口線鎖存為1 時打開。當(dāng)引腳懸空時,這個極弱的上拉源產(chǎn)生很弱的上拉電流將引腳上拉為高電平。 第

29、3個上拉晶體管稱為“強上拉”。當(dāng)口線鎖存器由0到1跳變時,這個上拉用來加快準(zhǔn)雙向口由邏輯0到邏輯1轉(zhuǎn)換。當(dāng)發(fā)生這種情況時,強上拉打開約2個機器周期以使引腳能夠迅速地上拉到高電平。 準(zhǔn)雙向口輸出如下圖所示。 STC12C520系列單片機為3V器件,如果用戶在引腳加上5V電壓,將會有電流從引腳流向VDD,這樣導(dǎo)致額外的功率消耗。因此,建議不要在準(zhǔn)雙向口模式中向3V 單片機引腳施加5V電壓,如使用的話,要加限流電阻,或用二極管做輸入隔離,或用三極管做輸出隔離。 準(zhǔn)雙向口帶有一個施密特觸發(fā)輸入以及一個干擾抑制電路。 2 .推挽輸出配置 推挽輸出配置的下拉結(jié)構(gòu)與開漏輸出以及準(zhǔn)雙向口的下拉結(jié)構(gòu)相同,但當(dāng)鎖

30、存器為1時提供持續(xù)的強上拉。推挽模式一般用于需要更大驅(qū)動電流的情況。 推挽引腳配置如下圖所示。 3 .僅為輸入(高阻)配置 輸入口配置如下圖所示。 輸入口帶有一個施密特觸發(fā)輸入以及一個干擾抑制電路。 4.開漏輸出配置 當(dāng)口線鎖存器為0時,開漏輸出關(guān)閉所有上拉晶體管。當(dāng)作為一個邏輯輸出時,這種配置方式必須有外部上拉,一般通過電阻外接到V D D 。這種方式的下拉與準(zhǔn)雙向口相同。輸出口線配置如下圖所示。 開漏端口帶有一個施密特觸發(fā)輸入以及一個干擾抑制電路。 一種典型三極管控制電路 如果用弱上拉控制,建議加上拉電阻R1(3.3K10K),如果不加上拉電阻R 1(3.3K10K),建議R2的值在15K

31、以上,或用強推挽輸出。STC12C5204AD系列單片機可編程計數(shù)器陣列(PCA) PCA含有一個特殊的16位定時器,有4個16位的捕獲/比較模塊與之相連。每個模塊可編程工作。 在4 種模式下:上升/下降沿捕獲、軟件定時器、高速輸出或可調(diào)制脈沖輸出。模塊0連接到P3.7(CEX0/PCA0/PWM0),模塊1連接到P3.5(CEX1/PCA1/PWM1),模塊2連接到P2.0(CEX2/PCA2/PWM2),模塊3連接到P2.4(CEX3/PCA3/PWM3)。寄存器CH和CL的內(nèi)容是正在自由遞增計數(shù)的16位PCA 定時器的值。PCA定時器是4個模塊的公共時間基準(zhǔn),可通過編程工作在:1/12振

32、蕩頻率、1/2振蕩頻率、定時器0溢出或ECI腳的輸入(P3.4)。定時器的計數(shù)源由CMOD SFR 的CPS1和CPS0位來確定(見CMOD特殊功能寄存器說明)。 可編程計數(shù)器陣列 PCA定時器/計數(shù)器 CMOD SFR 還有2個位與PCA相關(guān)。它們分別是:CIDL,空閑模式下允許停止PCA;ECF,置位時,使能PCA中斷,當(dāng)PCA定時器溢出將PCA計數(shù)溢出標(biāo)志CF(CCON SFR)置位。 CCON SFR包含PCA的運行控制位(CR)和PCA定時器標(biāo)志(CF)以及各個模塊的標(biāo)志(CCF3/CCF2/CCF1/CCF0)。通過軟件置位CR 位(CCON.6)來運行PCA。CR位被清零時PCA

33、關(guān)閉。當(dāng)PCA計數(shù)器溢出時,CF位(CCON.7)置位, 如果CMOD寄存器的ECF位置位, 就產(chǎn)生中斷。CF位只可通過軟件清除。CCON 寄存器的位03是PCA各個模塊的標(biāo)志(位0對應(yīng)模塊0,位1對應(yīng)模塊1,位2對應(yīng)模塊2,位3 對應(yīng)模塊3),當(dāng)發(fā)生匹配或比較時由硬件置位。這些標(biāo)志也只能通過軟件清除。所有模塊共用一個中斷向量。PCA的中斷系統(tǒng)如圖所示。 PCA的每個模塊都對應(yīng)一個特殊功能寄存器。它們分別是:模塊0對應(yīng)CCAPM0,模塊1對應(yīng)CCAPM1,模塊2對應(yīng)CCAPM2,模塊3對應(yīng)CCAPM3。特殊功能寄存器包含了相應(yīng)模塊的工作模式控制位。 當(dāng)模塊發(fā)生匹配或比較時,ECCFn位(CCA

34、PMn.0,n=0,1 ,2,3 由工作的模塊決定)使能CCON SFR的CCFn標(biāo)志來產(chǎn)生中斷。 PWM(CCAPMn.1)用來使能脈寬調(diào)制模式。 當(dāng)PCA計數(shù)值與模塊的捕獲/比較寄存器的值相匹配時,如果TOG位(CCAPMn.2)置位,模塊的CEXn 輸出將發(fā)生翻轉(zhuǎn)。 當(dāng)PCA計數(shù)值與模塊的捕獲/比較寄存器的值相匹配時,如果匹配位MATn(CCAPMn.3)置位,CCON 寄存器的CCFn位將被置位。 CAPNn(CCAPMn.4)和CAPPn(CCAPMn.5)用來設(shè)置捕獲輸入的有效沿。CAPNn位使能下降沿有效,CAPPn位使能上升沿有效。如果兩位都置位,則兩種跳變沿都被使能,捕獲可在兩種跳變沿產(chǎn)生。 通過置位CCAPMn寄存器的ECOMn位(CCAPMn.6)來使能比較器功能。 每個PCA模塊還對應(yīng)另外兩個寄存器,CCAPnH和CCAPnL。當(dāng)出現(xiàn)捕獲或比較時,它們用來保存16位的計數(shù)值。當(dāng)PCA模塊用在PWM模式中時,它們用來控制輸出的占空比。 PCA捕獲模式 要使一個PCA模塊工作在捕獲模式(下圖),寄存器CCAPMn的兩位(CAPNn 和CAPPn)或其中任何一位必須置1。對模塊的外部CEXn 輸入(CEX0/P3.7,CEX1/P3.5,CEX2/P2.0,CEX